Talk:DreamTeam/Brainduino: Difference between revisions

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(calculating expected gains)
(validation plan)
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(or if no offset voltage and input is actually ~ -5 to +5 millivolts,
(or if no offset voltage and input is actually ~ -5 to +5 millivolts,
then output will be -0.5 to +0.5 volts)
then output will be -0.5 to +0.5 volts)
(however, there is a +2.5 Volt DC offset impinging on the AD2177 part of the instrumentation amp setup
... we think this is ok to say ... But is option A grounded -- no offset -- or 2.5 volts ?


where might DC offset voltage come into play?  
where might DC offset voltage come into play?  
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4th Stage IC3D>IC3C Ch1, and IC3A>IC3B, Potentially considered a two-pole high-cut(aka low-pass)
4th Stage IC3D>IC3C Ch1, and IC3A>IC3B, Potentially considered a two-pole high-cut(aka low-pass)
Next week: verify 101 x gain, 100 x gain, DC offset !

Revision as of 23:49, 14 December 2016

what is value of c33? 50 pF or 1 nF ? determines high-cut frequency either 160 Hz (1 nF) or 3200 Hz (50 pF)

Op amps ...

OPA2111 - what gain? expecting ~ 100 ?

what values for R27, R23, R24 ? (also R28, R25, R26)

R27 should be 2K ohms R23, R24 -> 100K ohms

cf instrumentation amp (figure 9 of http://www.ti.com/lit/ds/symlink/opa2111.pdf) 1 + (R23 + R24) / R27 ... so 1 + (200 K / 2 K) = 101

so if input signal is on order of 100 microvolts then output of first amp will be 10.100 millivolts (really more like -50 to +50 microvolts -> -5 to +5 millivolts)

AD8422 R5 and R6 are 200 ohms G = 1 + (19.8 kΩ/RG) = 1 + 99 = 100

??? also see fig. 56 on page 20 of http://www.analog.com/media/en/technical-documentation/data-sheets/AD8422.pdf

now consider if input to AD8422 is on order of 10 millivolts output will be 1.000 volts (or if no offset voltage and input is actually ~ -5 to +5 millivolts, then output will be -0.5 to +0.5 volts)

(however, there is a +2.5 Volt DC offset impinging on the AD2177 part of the instrumentation amp setup ... we think this is ok to say ... But is option A grounded -- no offset -- or 2.5 volts ?

where might DC offset voltage come into play?

2nd Stage AD8422 Instrumentation amp with gain resistor 2(10 kΩ + RREF)/(20 kΩ + RREF) http://www.analog.com/media/en/technical-documentation/data-sheets/AD8422.pdf In figure 56, you will see that an op amp is used to input to the VREF pin.

3rd stage Low-cut (aka high-pass ) filter and DC offset to 3rd Stage OP2177ARMZ ( IC1B Ch1 and IC1A Ch2 )

4th Stage IC3D>IC3C Ch1, and IC3A>IC3B, Potentially considered a two-pole high-cut(aka low-pass)


Next week: verify 101 x gain, 100 x gain, DC offset !